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Topics & Projects

Electronic design related projets

  1. Wireless sensor networks
    A considerable work has been conducted by the OR group on the wireles sensor network problems. This work is done in collaboration with the University of Hyderabad (India), the University of Los Andes (Bogota, Colombia) and the University of Montpellier, France.
  2. Memory allocation
    The OR group is actively working on the specific problem of binding data into memory banks to reduce the cost of an architecture while increasing time performances. Results are implemented in SoftExplorer.
  3. Conception of adaptative embedded systems
    The OR group was involved in the ANR-AFANA project. Two models for routing the data packets over a network on chip (NoC) have been proposed, along with exact and heuristic approaches.
  4. Design of advanced architectures
    The OR group has addressed a significant issue on High Level Synthesis (HLS) and proposed advanced metaheuristics for solving three of the four major problems in HLS, namely allocation, assignment and scheduling. Improvements are integrated in GAUT, a free HLS software developped at Lab-STICC. Research on Taylor Expansion Diagrams has also been conducted.

Other projects

  1. Assignment problems
    This work, rather theoretical at first view, had a lot of practical applications.
  2. Other domains of interest
    The group is also working on routing problems, graph theory, scheduling problems, robustness, etc.

Related presentations

Marc Sevaux presented his latest work on Hardware architectures for optimization at ROADEF 2013

One of the latest work of the OR-Group concerns the design of hardware archtectures for solving optimization problems. The goal of this project is to create a specific hardware equipement dedicated to solving optimization problems. It has been shown extremely powerful and faster than GP-GPU implementation.

Slides can be downloaded by clicking here.

OR-Group gave a seminar at the University of Hamburg

On January 20, 2011, Marc Sevaux had given a seminar at the University of Hamburg. Professor Stefan Voß had invited us to present  our activities in optimization conducted at Lab-STICC. The people attended the presentation did not expect to see how many optimization problems you can encounter in electronic design. The discussion that follows was fruitful and give us a new path for potential collaboration.

Invited seminar at CEA

The OR-Group has been invited on 1st of december 2010 at the CEA (Commissariat à l'énergie atomique) to present its activites in optimization for electronic design and create potential collaborations in the future. The presentation was about 2h and raised a large number of questions and an active discussion around potential common subjects. CEA is hosting several former PhD students of the Lab-STICC, including Kods Trabelsi, a former member of our team.